| My Home Page | Biography | Research | Publications | Contact	Rakesh Kumar Assistant Professor Center for Reliable and High-Performance Computing Coordinated Science Laboratory University of Illinois at Urbana-Champaign 1308 West Main Street Urbana, IL 61801 USA. Research: I am currently interested in both disruptive and non-distruptive, but impactful approaches to build robust and low power computing systems. I am particularly interested in projects on: programmable stochastic computing , a computing paradigm that embraces hardware errors in architecture and design of software and hardware systems to dramatically reduce system power and cost. Projects span program analysis, architecture, and design. algorithmic techniques for fault tolerance. The goal is to identify algorithmic transformations, constructs, and invariats that can be used to significantly reduce the cost of providing system reliability, especially in context of exascale systems. design and architecture of energy-constrained SoCs. Focus areas include power-balanced pipelines, peak power management, energy-proportional designs, and better-than-worst-case designs. low power memory systems. Our interests lie in architectural and coding-based approaches to build error resilient memories at low power cost. Current interests include chipkill memories, die-stacked memories, and embedded DRAMs. I direct the PASSAT Group at Illinois. Please refer to the group webpages for details on the current research projects. *************************WEB BOARD******************************** I am looking for motivated graduate/undergraduate students. If you are a UIUC graduate/undergraduate student looking for an advisor or if you are someone interested in applying to UIUC for graduate studies, email rakeshk@illinois.edu if you want to do research in computer architecture, CAD/architecture interactions, low power design, or reliability and fault tolerance. See our research/publications pages for a sampling of our research. Please attach your CV as well.