PASSAT GROUP @ UIUC
	| Home | Projects | People | Publications | Software/Tools | Press | Wiki | Contact	Selected Publications (all relevant copyrights apply) Book Chapters / Journals (all relevant copyrights apply) Rakesh Kumar and Dean Tullsen. The Architecture of Efficient Multi-core Processors: A Holistic Approach. Advances in Computers. Elseiver. Chapter 01, Vol 69, May 2007 (PDF). Conferences (all relevant copyrights apply) John Sartori, Aashish Pant, Rakesh Kumar, and Puneet Gupta. " Variation-Aware Speed Binning of Multi-core Processors". In the 11th ACM/IEEE International Symposium on Quality Electronic Design, ISQED, San Jose, March 2010. (PDF). Sriram Narayanan, John Sartori, Rakesh Kumar, and Doug Jones. " Scalable Stochastic Processors". In Design, Automation and Test in Europe, DATE, Dresden, March 2010. (PDF). Andrew Kahng, Seokhyeong Kang, Rakesh Kumar, and John Sartori. " Designing Soft Architectures from the Ground Up (Or a Design Methodology to Allow Voltage/Reliability Tradeoffs in Processors)". In the 16th IEEE International Symposium on High-Performance Computer Architecture, HPCA, Bangalore, January 2010. (PDF). John Sartori and Rakesh Kumar. " Low Overhead, High-Speed Multi-core Barrier Synchronization". In the 5th International Conference on High-Performance Embedded Architectures and Compilers, HiPEAC, Pisa, January 2010. (PDF). Andrew Kahng, Seokhyeong Kang, Rakesh Kumar, and John Sartori. " Slack Redistribution for Graceful Degradation Under Voltage Overscaling". In the 15th IEEE/SIGDA Asia and South Pacific Design and Automation conference, ASPDAC, Tapie, January 2010. (PDF). Vasileios Kontorinis, Amirali Shayan, Rakesh Kumar, and Dean Tullsen. " Reducing Peak Power with a Table-Driven Adaptive Processor Core". In the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO, New York City, December 2009. (PDF). John Sartori and Rakesh Kumar. " Three Scalable Approaches to Improving Many-core Throughput for a Given Peak Power Budget". In the 16th IEEE International Conference on High Performance Computing, HiPC, Cochin, December 2009. (PDF). Joseph Sloan and Rakesh Kumar. " Towards Scalable Reliability Frameworks for Error Prone CMPs". In the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES, Grenoble, October 2009. (PDF). Shoiab Akram, Rakesh Kumar, and Deming Chen. " Workload Adaptive Shared Memory Multicore Processors with Reconfigurable Interconnects". In the 7th IEEE Symposium on Application-Specific Processors, SASP, San Francisco, July 2009. (PDF1). Nam Duong and Rakesh Kumar. " Register Multimapping: A Technique for Reducing Register Bank Conflicts in Processors with Large Register Files". In the 7th IEEE Symposium on Application-Specific Processors, SASP, San Francisco, July 2009. (PDF1)(PDF2). John Sartori and Rakesh Kumar. "Distributed Peak Power Management for Many-core Architectures". Design, Automation, and Test in Europe, DATE, Nice, March 2009. (PDF1)(PDF2). Sukhun Kang and Rakesh Kumar. "Magellan: A Framework for Fast Muti-core Design Space Exploration and Optimization Using Search and Machine Learning ". Design, Automation, and Test in Europe, DATE, Munich, March 2008. (PDF). Jeff Brown, Rakesh Kumar, and Dean Tullsen. "Proximity-Aware Directory-based Coherence for Multi-core Processor Architectures ". 19th ACM Symposium on Parallelism in Algorithms and Architectures , SPAA, San Diego, June 2007 (PDF). David Sheldon, Rakesh Kumar, Frank Vahid, Dean Tullsen, and Roman Lysecky. "Conjoining Soft-Core FPGA Processors". International Conference on Computer-Aided Design, ICCAD, San Jose, November 2006 (PDF). David Sheldon, Rakesh Kumar, Frank Vahid, Roman Lysecky, and Dean Tullsen. "Application-Specific Customization of Parameterized FPGA Soft-Core Processors". International Conference on Computer-Aided Design, ICCAD, San Jose, November 2006 (PDF). Workshops (all relevant copyrights apply) John Sartori, Joseph Sloan and Rakesh Kumar. "Fluid NMR - Performing Power/Reliability Tradeoffs for Applications with Error Tolerance". In the USENIX Workshop on Power-aware Computing and Systems (HotPower 2009), October 2009 (PDF). John Sartori and Rakesh Kumar. "Alleviating Voltage Scaling Limitations of Razor-based Designs". In the 18th IEEE Workshop on Logic and Synthesis (IWLS 2009), August 2009 (PDF). John Sartori, Ashish Pant, Rakesh Kumar, and Puneet Gupta. "On Performance Binning of Multi-core Processors;. In the 3rd IEEE International Workshop on Design for Manufacturability and Yield 2009 (dfm&y) July 2009 (PDF). John Sartori and Rakesh Kumar. "Characterizing the Voltage-Scaling Limitations of Razor-based Designs;. In the Workshop on Energy-Effective Design (WEED) July 2009 (PDF). Nicolas Zea, Rakesh Kumar, and Hong Wang. "Parallelizing Computational Photography". In Workshop on Optimizations in DSP and Embedded Systems (ODES-7), March 2009 (PDF). Sriram Narayanan, Galen Lyle, Rakesh Kumar, and Doug Jones. "Testing the Critical Operating Point (COP) Hypothesis using FPGA Emulation of Timing Errors in Over-scaled Soft-processors". In the 5th IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE), March 2009 (PDF). Nicolas Zea, John Sartori and Rakesh Kumar. "Servo: A Programming Model for Many-core Computing". In Workshop on Design, Architecture, and Simulation of Chip Multiprocessors(dasCMP), December 2007 (PDF). Technical Reports (all relevant copyrights apply) Carl Erik-Svensson, David Kesler, Rakesh Kumar, and Gilles Pokam. "MPreplay: Architecture Support for Deterministic Replay of Message Passing Programs on Message Passing Many-core Processors". UIUC CRHC Technical Report CRHC-09-06, UIUC Technical Report UILU-09-2209, April 2009 (PDF). Joseph Sloan and Rakesh Kumar. "Hardware/System Support for Four Economic Models for Many-core Computing ". UIUC CRHC Technical Report CRHC-07-07, December 2007 (PDF). Sukhun Kang and Rakesh Kumar. "Magellan: A Framework for Fast Muti-core Design Space Exploration and Optimization Using Search and Machine Learning ". UIUC CRHC Technical Report CRHC-07-05, October 2007 (PDF). John Sartori and Rakesh Kumar. "Proactive Peak Power Management for Many-core Architectures ". UIUC CRHC Technical Report CRHC-07-04, October 2007 (PDF). Prior to September 2006 Rakesh Kumar. Holistic Design for Multi-core Architectures. PhD Thesis. University of California, San Diego. September 2006 (PDF) Norman P. Jouppi, Rakesh Kumar, and Dean Tullsen. Introduction to the Special Issue on the 2006 Workshop on the Design, Analysis, and Simulation of Chip Multiprocessors (dasCMP06)?. ACM SIGARCH Computer Architecture News. March 2007. Norman P. Jouppi, Rakesh Kumar, and Dean Tullsen. Introduction to the Special Issue on the 2005 Workshop on the Design, Analysis, and Simulation of Chip Multiprocessors (dasCMP05)?. ACM SIGARCH Computer Architecture News. December 2005. Rakesh Kumar, Dean Tullsen, Norman Jouppi, and Partha Ranganathan. "Heterogeneous Chip Multiprocessors". In IEEE Computer, November 2005 (PDF). Rakesh Kumar and D. Dutta Majumdar. "A multi-processing Database model for efficient storage and retrieval of Medical Images" In Journal of Computer Science & Informatics, Volume 30, No 3, page 31-38. Rakesh Kumar, Dean Tullsen, and Norman Jouppi. Core Architecture Optimization for Heterogeneous Chip Multiprocessors". International Conference on Parallel Architectures and Compilation Techniques, PACT, Seattle, April 2006(PDF) Matt Devuyst, Rakesh Kumar, Dean Tullsen. "Exploiting Unbalanced Thread Scheduling for Energy and Performance on a CMP of SMT Processors". International Parallel and Distributed Processing Symposium, IPDPS-2006, Rhodes Island, Greece, April 2006(PDF) Rakesh Kumar, Victor Zyuban, Dean Tullsen. "Interconnections in multi-core architectures: Understanding Mechanisms, Overheads and Scaling". 32nd International Symposium on Computer Architecture, ISCA-32, Madison, Wisconsin, June 2005(PDF) Rakesh Kumar, Norman Jouppi, Dean Tullsen. "Conjoined-core chip multiprocessing". 37th International Symposium on Microarchitecture, MICRO-37, Portland, Oregon, Dec., 2004 (PDF) Eric Tune, Rakesh Kumar, Dean Tullsen, Brad Calder "Balanced Multithreading: Increasing Throughput via a Low Cost Multithreading Hierarchy" 37th International Symposium on Microarchitecture, MICRO-37, Portland, Oregon, Dec., 2004(PDF) Rakesh Kumar, Dean Tullsen, Partha Ranganathan, Norman Jouppi, Keith Farkas. "Single-ISA Heterogeneous Multi-core Architectures for Multithreaded Workload Performance". In 31st International Symposium on Computer Architecture, ISCA-31, June 2004.(PDF) Rakesh Kumar, Keith Farkas, Norman Jouppi, Partha Ranganathan and Dean Tullsen. "Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction". In 36th International Symposium on Microarchitecture, MICRO-36, Dec. 2003.(PDF) Rakesh Kumar and Dean Tullsen. "Compiling for Instruction Cache Performance on a Multitreaded Architecture". In the 35th Annual International Symposium on Microarchitecture, MICRO-35, November 2002.(PDF) Rakesh Kumar, Keith Farkas, Norman Jouppi, Partha Ranganathan and Dean Tullsen. "A Multi-Core Approach to Addressing the Energy-Complexity Problem in Microprocessors". Workshop on Complexity-Effective Design, WCED03, June 2003.(PDF) Yiannakis Sazeidis, Rakesh Kumar, Dean M. Tullsen and Theophanis Konstantinou. "The Danger of Interval-Based Power-Efficiency Metrics:When Worst is Best". Computer Architecture Letters, Volume 4, January 2005.(PDF) Rakesh Kumar, Keith Farkas, Norman Jouppi, Partha Ranganathan and Dean Tullsen. "Processor Power Reduction Via Single-ISA Heterogeneous Multi-Core Architectures". Computer Architecture Letters, Volume 2, April 2003.(PDF)